In DC-DC converters, if an output current is low, VFM mode control method that can improve efficiency of the DC-DC converters by reducing a switching frequency of a switching device may be adopted. The VFM (i.e., Variable Frequency Modulation) mode control method is a method that outputs a constant voltage by determining an on-state time of a switching device of a DC-DC converter based on input and output voltages, by returning a monitoring output state and by adjusting a switching frequency based on the output state.
Moreover, if the output current is low, reducing a consumption current of a control circuit of the DC-DC converter is required in order to improve efficiency of a switching supply in parallel.
FIG. 1 is a circuit diagram of a DC-DC converter disclosed in Japanese Laid-Open Patent Application Publication No. 10-225105 (which is hereinafter called a first patent document). As shown in FIG. 1, the DC-DC converter 70 includes a synchronous rectifier circuit comprised of a switching transistor Q1 to provide an inductor L with an input voltage Vin selectively, a rectifier transistor Q2 and a schottky diode D2. The rectifier transistor Q2 is controlled by a reverse phase of the switching transistor Q1. More specifically, when the switching transistor Q1 is in an off-state (i.e., when RS flip flop FF1 is in a reset state), the rectifier transistor Q2 goes into an on-state and an inductor current IL flows through the rectifier transistor Q2. When the switching transistor Q1 is in an on-state, a current flowing through the inductor L gets to an output terminal Vout through a sense resistor Rs and is provided for a load. An output capacitor Cout stores electric power provided from the inductor L, and drives the load (i.e., provides a current for the load) when the inductor current IL for driving from the inductor L does not exist.
In a voltage regulator circuit shown in FIG. 1, two feedback paths are provided. In a first feedback path, a first feedback signal Vcnt1 that shows a target maximum inductor current to maintain an output voltage at a predetermined value is used. The first feedback signal Vcnt1 is generated by comparing a voltage VFB that is obtained by dividing the output voltage by a voltage divider comprised of dividing resistors R1 and R2, with a reference voltage Vref, by using a difference amplifier 58.
In a second feedback path, a second feedback voltage signal Vs, a voltage between both ends of the sense resistor Rs (i.e., the second feedback voltage signal Vs/the inductor current IL), is detected, and the second feedback voltage signal Vs is compared to the first feedback signal Vcnt1 by a comparator 56. The comparator 56 generates a reset signal to open the switching device Q1 (i.e., to turn off the switching device Q1) by resetting the RS flip flop FF1 when the second feedback voltage signal Vs is higher than the first feedback voltage signal Vcnt1. As a preferred embodiment, the RS flip flop FF1 gives priority to a reset input signal over a set input signal.
A comparator 60 compares the first feedback signal Vcnt1 to a light load reference voltage VLL and outputs a signal expressing a time constant determined by a load state. While the DC-DC converter is working, if the first feedback signal Vcnt1 becomes lower than the light load reference voltage VLL, the comparator 60 outputs a “L” level signal. An AND circuit AND1 waits in a state where an output from the comparator 60 and the set signal generated from a set pulse generator 62 both become “H” level (which means a high level voltage corresponding to “1” in a binary code) so as to provide a set terminal of the RS flip flop FF1 with a set pulse. Here if the first feedback signal Vcnt1 becomes lower than the light load reference voltage VLL, by which the output of the comparator 60 becomes “L” level, an output of the set pulse generator 62 cannot pass through the AND circuit AND1. As a result, a Q output of the RS flip flop FF1 comes to be set with a lower frequency than a normal state.
The above-mentioned DC-DC converter has a configuration that can keep the output voltage of the DC-DC converter constant by monitoring the output of an error amplifier and by being controlled by VFM mode control method if an output current is low.
However, the DC-DC converter described in the first patent document does not clearly specify a means to reduce a consumption current of a control circuit in the DC-DC converter, including a consumption current of the comparator monitoring the output of the error amplifier, and to improve efficiency of a switching supply.
In case of the VFM mode control method, it is possible to keep an output voltage constant because a switching frequency is controlled to be low if an output current is low, and is controlled so as to be higher as the output current increases.
When the output current increases and the switching frequency increases, some circuits that constitute a control circuit of a DC-DC converter need certain characteristics according to the switching frequency. In particular, in case of a first comparator into which outputs from a second reference voltage and an error amplifier are input, a component of the switching frequency is superimposed on the output voltage, and the component of the switching frequency is also superimposed on the output of the error amplifier into which a monitoring output obtained by dividing the output voltage is input. Therefore, the first comparator into which the output of the error amplifier is input needs the characteristic according to the switching frequency.
To meet the characteristic in a case where the switching frequency is high, it is possible to preliminarily set a consumption current to be high. However, when the output current is low and the switching frequency is low, the characteristic becomes excessive, which causes an increase of the consumption current of the DC-DC converter control circuit and a decrease of efficiency of a switching supply including the DC-DC converter control circuit.
On the other hand, even if the output current increases and the switching frequency becomes high, in a case where a proper characteristic according to the switching frequency is not provided for the first comparator, the output voltage of the switching supply becomes unstable, which possibly makes an output voltage ripple greater.